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SEMICONDUCTOR
ICL232
+5V Powered, Dual RS-232 Transmitter/Receiver
Description
The ICL232 is a dual RS-232 transmitter/receiver interface circuit that meets all ElA RS-232C and V.28 specifications. It requires a single +5V power supply, and features two onboard charge pump voltage converters which generate +10V and -10V supplies from the 5V supply. The drivers feature true TTL/CMOS input compatibility, slewrate-limited output, and 300 power-off source impedance. The receivers can handle up to +30V, and have a 3k to 7k input impedance. The receivers also have hysteresis to improve noise rejection.
August 1997
Features
* Meets All RS-232C and V.28 Specifications * Requires Only Single +5V Power Supply * Onboard Voltage Doubler/Inverter * Low Power Consumption * 2 Drivers - 9V Output Swing for +5V lnput - 300 Power-off Source Impedance - Output Current Limiting - TTL/CMOS Compatible - 30V/s Maximum Slew Rate * 2 Receivers - 30V Input Voltage Range - 3k to 7k Input Impedance - 0.5V Hysteresis to Improve Noise Rejection * All Critical Parameters are Guaranteed Over the Entire Commercial, Industrial and Military Temperature Ranges
Ordering Information
PART NUMBER ICL232CPE ICL232CBE ICL232lPE ICL232lJE ICL232lBE ICL232MJE TEMP. RANGE (oC) 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 -55 to 125 PACKAGE 16 Ld PDIP 16 Ld SOIC 16 Ld PDIP 16 Ld CERDIP 16 Ld SOIC 16 Ld CERDIP PKG. NO. E16.3 M16.3 E16.3 F16.3 M16.3 F16.3
Applications
* Any System Requiring RS-232 Communications Port - Computer - Portable and Mainframe - Peripheral - Printers and Terminals - Portable Instrumentation - Modems * Dataloggers
Pinout
ICL232 (PDIP, CERDIP, SOIC) TOP VIEW
C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V- 6 T2OUT 7 R2IN 8 16 VCC 15 GND 14 T1OUT 13 R1IN 12 R1OUT 11 T1IN 10 T2IN 9 R2OUT
Functional Diagram
+5V + 1.0F 1 1F + 3 4 1F + 5 16 1F
C1+ C1C2+ C2-
VCC 2 +5V TO 10V VOLTAGE INVERTER V+ +10V TO -10V VOLTAGE INVERTER T1 T2 7 13 R1 5k 8 R2 15 5k V- 6
+
T1IN T2IN R1OUT
+5V 400k 11 +5V 400k
+ 14
1F T1OUT T2OUT R1IN
10 12
R2OUT
9
R2IN
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
(c) Harris Corporation 1997
File Number
3020.5
8-49
ICL232
Absolute Maximum Ratings
VCC to Ground . . . . . . . . . . . . . . . . . . . . . .(GND -0.3V) < VCC < 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 12V V- to Ground . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V) Input Voltages T1IN , T2IN . . . . . . . . . . . . . . . . . . . . (V- -0.3V) < VIN < (V+ +0.3V) R1IN , R2IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Output Voltages T1OUT , T2OUT . . . . . . . . . . . . (V- -0.3V) < VTXOUT < (V+ +0.3V) R1OUT , R2OUT . . . . . . . . .(GND -0.3V) < VRXOUT < (VCC +0.3V) Short Circuit Duration T1OUT , T2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous R1OUT , R2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) CERDIP Package . . . . . . . . . . . . . . . . 80 18 PDIP Package . . . . . . . . . . . . . . . . . . . 100 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 100 N/A Maximum Junction Temperature Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Ranges ICL232C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC ICL232I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC ICL232M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
Test Conditions: VCC = +5V 10%, TA = Operating Temperature Range. Test Circuit as in Figure 8 Unless Otherwise Specified TEST CONDITIONS T1OUT and T2OUT Loaded with 3k to Ground Outputs Unloaded, TA = 25oC MIN 5 2.0 T1IN , T2IN = 0V -30 VIN = 3V VCC = 5V, TA = 25oC VCC = 5V, TA = 25oC 3.0 0.8 0.2 IOUT = 3.2mA IOUT = -1.0mA RS-232 to TTL CL = 10pF, RL = 3k, TA = 25oC (Notes 2, 3) RL = 3k, CL = 2500pF Measured from +3V to -3V or -3V to +3V VCC = V+ = V- = 0V, VOUT = 2V T1OUT or T2OUT Shorted to GND 3.5 300 TYP 9 5 15 5.0 1.2 1.7 0.5 0.1 4.6 0.5 3 10 MAX 10 10 0.8 200 +30 7.0 2.4 1.0 0.4 30 UNITS V mA V V A V k V V V V V s V/s V/s mA
Transmitter Output Voltage Swing, TOUT Power Supply Current, ICC TIN , Input Logic Low, VlL TIN , Input Logic High, VlH Logic Pullup Current, IP RS-232 Input Voltage Range, VIN Receiver Input Impedance, RIN Receiver Input Low Threshold, VlN (H-L) Receiver Input High Threshold, VIN (L-H) Receiver Input Hysteresis, VHYST TTL/CMOS Receiver Output Voltage Low, VOL TTL/CMOS Receiver Output Voltage High, VOH Propagation Delay, tPD Instantaneous Slew Rate, SR Transition Region Slew Rate, SRT Output Resistance, ROUT RS-232 Output Short Circuit Current, ISC NOTES: 2. Guaranteed by design. 3. See Figure 4 for definition.
8-50
ICL232 Test Circuits
1 C1+ 1F C3 1F C1 + +4.5V TO +5.5V INPUT 1 2 3 1F + C2 4 5 C1+ V+ C1C2+ C2VT2OUT R2IN VCC 16 GND 15 3k T1OUT 14 R1IN 13 R1OUT 12 T1IN 11 T2IN 10 R2OUT 9 T1 OUTPUT RS-232 30V INPUT TTL/CMOS OUTPUT TTL/CMOS INPUT TTL/CMOS INPUT TTL/CMOS OUTPUT 5 C26 V7 T2OUT 8 R2IN R1OUT 12 T1IN 11 T2IN 10 R2OUT 9 T2OUT VCC 16 GND 15 T1OUT 14 R1IN 13
+
2 V+ 3 C14 C2+
-
3k 7 T2 OUTPUT RS-232 30V INPUT 8
FIGURE 1. GENERAL TEST CIRCUIT
Typical Performance Curves
550 V+, V- SUPPLY IMPEDANCES () 500 OUTPUT VOLTAGE (|V|)
o 450 TA = 25 C EXTERNAL SUPPLY LOAD 400 1k BETWEEN V+ + GND OR V- + GND 350 TRANSMITTER OUTPUT
300 250 200 150 3
OPEN CIRCUIT GUARANTEED OPERATING RANGE
V+ SUPPLY
FIGURE 3. V+, V- OUTPUT IMPEDANCES vs VCC
Pin Descriptions
PDIP, CERDIP 1 2 3 4 5 6 7 8 9 10 11 SOIC 1 2 3 4 5 6 7 8 9 10 11 PIN NAME C1+ V+ C1C2+ C2VT2OUT R2IN R2out T2IN T1IN DESCRIPTION External capacitor "+" for internal voltage doubler. Internally generated +10V (typical) supply. External capacitor "-" for internal voltage doubler. External capacitor "+" internal voltage inverter. External capacitor "-" internal voltage inverter. Internally generated -10V (typical) supply. RS-232 Transmitter 2 output 10V (typical). RS-232 Receiver 2 input, with internal 5K pulldown resistor to GND. Receiver 2 TTL/CMOS output. Transmitter 2 TTL/CMOS input, with internal 400K pullup resistor to VCC . Transmitter 1 TTL/CMOS input, with internal 400K pullup resistor to VCC .
-
1F C4 +
6
ROUT = VIN/I VIN = 2V A
T1OUT
FIGURE 2. POWER-OFF SOURCE RESISTANCE CONFIGURATION
10 9 V- SUPPLY 8 7 6 5 4 3 0 1 2 3 4 5 6 7 8 9 10 |ILOAD| (mA) TA = 25oC TRANSMITTER OUTPUTS OPEN CIRCUIT V- (VCC = 4.5V) V- (VCC = 5V)
V+ (VCC = 5V) V+ (VCC = 4.5V)
4
5
6
INPUT SUPPLY VOLTAGE VCC (V)
FIGURE 4. V+, V- OUTPUT VOLTAGES vs LOAD CURRENT
8-51
ICL232 Pin Descriptions
PDIP, CERDIP 12 13 14 15 16 (Continued) SOIC 12 13 14 15 16
VOLTAGE DOUBLER S1 VCC + + C1 C1+ S2 V+ = 2VCC S5
PIN NAME R1OUT R1IN T1OUT GND VCC Receiver 1 TTL/CMOS output.
DESCRIPTION
RS-232 Receiver 1 input, with internal 5K pulldown resistor to GND. RS-232 Transmitter 1 output 10V (typical). Supply Ground. Positive Power Supply +5V 10%
VOLTAGE INVERTER C2+ + S6 GND +
GND S3 RC OSCILLATOR C1-
S4
C3 VCC GND S7
C2-
C2
S8
C4 V- = -(V+)
FIGURE 5. DUAL CHARGE PUMP
Detailed Description
The ICL232 is a dual RS-232 transmitter/receiver powered by a single +5V power supply which meets all ElA RS232C specifications and features low power consumption. The functional diagram illustrates the major elements of the ICL232. The circuit is divided into three sections: a voltage doubler/inverter, dual transmitters, and dual receivers Voltage Converter. An equivalent circuit of the dual charge pump is illustrated in Figure 5. The voltage quadrupler contains two charge pumps which use two phases of an internally generated clock to generate +10V and -10V. The nominal clock frequency is 16kHz. During phase one of the clock, capacitor C1 is charged to VCC . During phase two, the voltage on C1 is added to VCC , producing a signal across C2 equal to twice VCC . At the same time, C3 is also charged to 2VCC , and then during phase one, it is inverted with respect to ground to produce a signal across C4 equal to -2VCC . The voltage converter accepts input voltages up to 5.5V. The output impedance of the doubler (V+) is approximately 200, and the output impedance of the inverter (V-) is approximately 450 . Typical graphs are presented which show the voltage converters output vs input voltage and output voltages vs load characteristics. The test circuit (Figure 3) uses 1F capacitors for C1-C4, however, the value is not critical. Increasing the values of C1 and C2 will lower the output impedance of the voltage doubler and inverter, and increasing the values of the reservoir capacitors, C3 and C4, lowers the ripple on the V+ and V- supplies.
T1IN, T2IN 90% 10% tf tr VOH VOL
Transmitters The transmitters are TTL/CMOS compatible inverters which translate the inputs to RS-232 outputs. The input logic threshold is about 26% of VCC , or 1.3V for VCC = 5V. A logic 1 at the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V and (V+ - 0.6V). Each transmitter input has an internal 400k pullup resistor so any unused input can be left unconnected and its output remains in its low state. The output voltage swing meets the RS-232C specification of 5V minimum with the worst case conditions of: both transmitters driving 3k minimum load impedance, VCC = 4.5V, and maximum allowable operating temperature. The transmitters have an internally limited output slew rate which is less than 30V/s. The outputs are short circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of 300 with 2V applied to the outputs and VCC = 0V.
V+ VCC 400k TXIN GND < TXIN < VCC V300 TOUT V- < VTOUT < V+
FIGURE 7. TRANSMITTER
Receivers The receiver inputs accept up to 30V while presenting the required 3k to 7k input impedance even it the power is off (VCC = 0V). The receivers have a typical input threshold of 1.3V which is within the 3V limits, known as the transition region, of the RS-232 specification. The receiver output is 0V to VCC . The output will be low whenever the input is greater than 2.4V and high whenever the input is floating or driven between +0.8V and -30V. The receivers feature 0.5V hysteresis to improve noise rejection.
T1OUT, T2OUT
(0.8) (VOH - VOL) (0.8) (VOL - VOH) Instantaneous = or Slew Rate (SR) tr tf FIGURE 6. SLEW RATE DEFINITION
8-52
ICL232
VCC RXIN -30V < RXIN < +30V GND 5k ROUT GND < VROUT < VCC 1 C1 + 1F C2 + 1F VOH VOL tPHL tPLH TD 3 ICL232 4 5 11 10 T1 T2 6 16
is generated by driving them through a 5k resistor connected to V+.
+5V
- C3 + 1F 5k 2
5k
FIGURE 8. RECEIVER
T1IN, T2IN OR R1IN, R2IN T1OUT, T2OUT OR R1OUT, R2OUT
+
CTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT
C4 1F RS-232 INPUTS AND OUTPUTS TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND SIGNAL GROUND (7)
14 7 13
INPUTS RTS OUTPUTS 12 TTL/CMOS RD CTS 9 R2 R1
tPHL + tPLH Average Propagation Delay = 2 FIGURE 9. PROPAGATION DELAY DEFINITION
8
15
Applications
The ICL232 may be used for all RS-232 data terminal and communication links. It is particularly useful in applications where 12V power supplies are not available for conventional RS-232 interface circuits. The applications presented represent typical interface configurations. A simple duplex RS-232 port with CTS/RTS handshaking is illustrated in Figure 10. Fixed output signals such as DTR (data terminal ready) and DSRS (data signaling rate select)
1 C1 + 1F TD INPUTS OUTPUTS TTL/CMOS RTS RD CTS 9 R2 R1 3 11 10 12 ICL232 T1 T2
FIGURE 10. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING
In applications requiring four RS-232 inputs and outputs (Figure 11), note that each circuit requires two charge pump capacitors (C1 and C2) but can share common reservoir capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters.
4 5 14 7 13 8 15
-
+ C2 1F TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND
+
V- V+ 6 2
+
C4
6
2
-
C3
-
+5V RS-232 INPUTS AND OUTPUTS
2F
2 F 16
ICL232 1 C1 + 1F DTR INPUTS OUTPUTS TTL/CMOS DSRS DCD R1 9 R2 R1 8 3 11 10 12 T1 T2 4 5 14 7 13 + C2 1F DTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT DCD (8) DATA CARRIER DETECT R1 (22) RING INDICATOR SIGNAL GROUND (7)
-
15
FIGURE 11. COMBINING TWO ICL232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
8-53

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